1. Field of the Invention:
This invention relates to a field effect transistor, and more particularly to a field effect transistor having a drain-current to drain-voltage characteristic similar to the anode-current to anode-voltage characteristic of the triode vacuum tube.
2. Description of the Prior Art:
There are two types in field effect transistors (FET's), i.e., a metal-oxide-semiconductor (MOS) type and a junction-gate (JUG) type. In both cases, the current of the carriers (unipolar) flowing from the source to the drain is effectively controlled by the gate voltage. The gate voltages applied with respect to the source voltage works to control the height of the depletion layer extending from the gate into the channel, which in turn controls the height of the region through which a current is allowed to flow. In a MOS FET, the current flowing through the channel formed beneath the gate electrode and insulated from the gate electrode by an oxide layer is controlled by the electric field established in the channel by the gate voltage. This is due to the variation in the height of the depletion layer extending from the oxide-semiconductor contact. In a JUG FET, a depletion layer formed around the PN junction is varied by the gate voltage and controls the current flowing through the channel. In conventional FET's of the both types, it is arranged that the current channel is open (conductive) when no gate voltage is applied externally and the conducting channel height is varied by the applied gate voltage.
The present inventors have found that various advantages can be obtained by forming an FET in such a fashion that the depletion layers (space charged layers) extending from the gates are substantially contiguous to each other even when no gate voltage is applied. This will be first described referring to a junction type FET proposed in Japanese Pat. application No. 28405/1971 by one of the present inventors, which has triode-like characteristics (unsaturated type) unlike the conventional current saturation type characteristics, and has a reduced series (source to drain) resistance so that the product of the series resistance r.sub.s (this forms a factor for generating negative feedback) and the transconductance G.sub.m is suppressed substantially less than unity.
A typical example of the characteristic curves is shown in FIG. 1, and a schematically illustrated structure which produces the characteristics of FIG. 1 is shown in FIG. 2. Namely, when the gate voltage is absent or small, the drain current I.sub.D increases almost linearly with increasing the drain voltage V.sub.D, as is illustrated by curves 1, 2, and 3. This may be called resistance modulation, since the variation in the gate voltage results in a variation in the resistance between the source and the drain i.e., .delta.V.sub.D /.delta.I.sub.D. When the negative gate voltage is increased in magnitude to suppress the drain current I.sub.D, the drain current I.sub.D first does not begin to flow until the drain voltage V.sub.D reaches a certain value, and then above said certain value rapidly increases more than linearly with increasing drain voltage V.sub.D as is shown by curves 4, 5, and 6. The phenomenon .[.that.]. .Iadd.whereby .Iaddend.the drain current I.sub.D increases linearly with increasing voltage V.sub.D as is shown by curves 1, 2 and 3 mainly appears in the case where the depletion layers extending from the gate electrodes G and G' .[.does.]. .Iadd.do .Iaddend.not .Iadd.yet .Iaddend.touch .[.yet.]. each other, whereas the phenomenon that the drain current I.sub.D .[.do.]. .Iadd.does .Iaddend.not begin to flow until the drain voltage V.sub.D reaches a certain positive value and increases rapidly with increasing drain voltage V.sub.D above said certain value mainly appears when the depletion layers extending from the gates have grown large enough by the application of a gate voltage and touch (not touch, to say exactly, but become very close) each other. In the latter case, the applied drain voltage below the certain value is found to be used for decreasing the potential barrier of the pinch-off portion made in the current path by the depletion layers.
In the above example, linear characteristics as shown by curves 1, 2, and 3 appeared when the gate voltage was small in magnitude, and characteristics very closely resembling those of a triode vacuum tube as shown by curves 4, 5, and 6 appeared when the gate voltage exceeded a certain value. Further, .Iadd.it is desirable that .Iaddend.the value .delta.V.sub.D /.delta.V.sub.G, which corresponds to the amplification factor .mu. of the triode vacuum tube, .[.is desired to.]. be large for obtaining a field effect transistor of a superior efficiency. Thus, it is desired to realize the characteristics corresponding to curves 4, 5, and 6 even in the region of small gate voltage, or in other words without the accompany of the characteristics corresponding to curves 1, 2, and 3, for providing elements of superior characteristics of a good efficiency and of little distortion.
It has been found by the present inventors that the above requirement can be satisfied by forming an FET in such a manner that the depletion layers extending from the gate electrodes are substantially contiguous (very close but not integrally connected) to each other even when no gate voltage is applied.
This can be achieved by using depletion layers due to carrier diffusion-recombination across a PN junction. Namely, the extent of a depletion .[.layers.]. .Iadd.layer .Iaddend.across the PN junction is determined by the barrier potential (or contact potential) and the impurity concentration (density) in the crystal. Practically, if the resistivity of the semiconductor crystal substrate is known, an FET having such depletion layers which are formed only by the carrier diffusion-recombination and are contiguous to each other even when no gate voltage is applied can be formed by appropriately selecting the distance between the gate electrodes G and G'. In such a structure, since the depletion layers almost touch each other, the drain current I.sub.D can easily show triode-like characteristics, not showing linear increase of the drain current with increasing drain voltage, even without the application of a large negative gate voltage V.sub.G. Namely, characteristics as shown in FIG. 3 are obtained with a reduction or absence of the linear region indicated by curves 1, 2, and 3 in FIG. 1. These transistors have such advantages that sufficient function can be obtained with a small gate voltage, that a large variation in the drain voltage V.sub.D can be obtained by a small variation in the gate voltage V.sub.G, and that excellent action with less distortion can be performed. In addition to these advantages, capacitances between gate-and-source, and gate-and-drain are reduced and the frequency characteristics are improved.
The above description has been made on a transistor having a reduced series resistance, but it also holds for a conventional transistor having a large series resistance. A conventional FET having a large series resistance and showing pentode-like characteristics can be considered as the above-mentioned FET having a reduced series resistance and showing triode-like characteristics, itself, but now .[.provide wih.]. .Iadd.provided with .Iaddend.a negative feed back circuit, or in .[.another word,.]. .Iadd.other words, .Iaddend.the FET .[.operating.]. .Iadd.operates .Iaddend.in an emitter follower fashion. Therefore, the advantages of the present concept described above can be also applied to such kind of transistors.
Next, description will be made on the state in which the depletion layers respectively extending from the gates touch each other. As is described above, the height of the depletion layer is a function of the barrier potential at the junction or contact and the impurity concentration (density) in the crystal. Usually, the height of a depletion layer is calculated by assuming that no carriers exist in the depletion layer and that only space charges which are perfectly ionized exist in the depletion layer and solving the Poisson's equation.
For example, in a case where a plate shaped PN junction has a stepwise carrier concentration distribution, i.e. the carrier concentration on one side of the PN junction is far larger than that on the other side, so that a depletion layer grows only into the other side, the height of the depletion layer .alpha. is expressed by EQU .alpha.=R.sqroot. V/N.sub.b
where R is a factor dependent on the physical constants of the semiconductor, N.sub.b the impurity concentration (density) in the semiconductor on that side in which the depletion layer grows, and V the applied voltage including the barrier potential. Strictly speaking, it is not that there are no carriers at all in the depletion layer, nor that a clear boundary exists at the edge of the depletion layer between the perfectly ionized region and the non-ionized region. Carriers are distributed according to the Fermi-Dirac distribution even into a depletion layer. The effective extent of a depletion layer is at least three times larger than the width of the depletion layer .alpha. calculated as above assuming that the depletion layer is perfectly ionized. Namely, the calculated height of the depletion layer based on the perfect ionization assumption is much lower than the actual effective height. Therefore, even if such semi-conductor materials in which the calculation with the perfect ionization assumption tells that the depletion layers touch each other only by the barrier potential with a gate-to-gate distance set at 20 micrometers is employed, the actual depletion layers can touch (become very close .Iadd.to.Iaddend.) each other with the gate-to-gate distance set at about 60 micrometers.